|
6 | 6 |
|
7 | 7 | #include <ite/it8801-mfd-map.dtsi> |
8 | 8 |
|
9 | | -&it8801_i2c { |
10 | | - it8801_mfd: it8801@38 { |
11 | | - compatible = "ite,it8801-mfd"; |
12 | | - reg = <0x38>; |
13 | | - #address-cells = <1>; |
14 | | - #size-cells = <1>; |
| 9 | +&it8801_mfd { |
| 10 | + #address-cells = <1>; |
| 11 | + #size-cells = <1>; |
15 | 12 |
|
16 | | - /* GPIO */ |
17 | | - ioex_it8801_port0: it8801_port@0 { |
18 | | - compatible = "ite,it8801-gpio"; |
19 | | - reg = <0x00 1 /* GPIPSR */ |
20 | | - 0x05 1 /* GPSOVR */ |
21 | | - 0x0a 8 /* GPCR */ |
22 | | - 0x32 1 /* GPISR */ |
23 | | - 0x37 1>; /* GPIER */ |
24 | | - gpio-controller; |
25 | | - #gpio-cells = <2>; |
26 | | - ngpios = <8>; |
27 | | - pin-mask = <0xdb>; |
28 | | - }; |
| 13 | + /* GPIO */ |
| 14 | + ioex_it8801_port0: it8801_port@0 { |
| 15 | + compatible = "ite,it8801-gpio"; |
| 16 | + reg = <0x00 1 /* GPIPSR */ |
| 17 | + 0x05 1 /* GPSOVR */ |
| 18 | + 0x0a 8 /* GPCR */ |
| 19 | + 0x32 1 /* GPISR */ |
| 20 | + 0x37 1>; /* GPIER */ |
| 21 | + gpio-controller; |
| 22 | + #gpio-cells = <2>; |
| 23 | + ngpios = <8>; |
| 24 | + pin-mask = <0xdb>; |
| 25 | + }; |
29 | 26 |
|
30 | | - ioex_it8801_port1: it8801_port@1 { |
31 | | - compatible = "ite,it8801-gpio"; |
32 | | - reg = <0x01 1 /* GPIPSR */ |
33 | | - 0x06 1 /* GPSOVR */ |
34 | | - 0x12 6 /* GPCR */ |
35 | | - 0x33 1 /* GPISR */ |
36 | | - 0x38 1>; /* GPIER */ |
37 | | - gpio-controller; |
38 | | - #gpio-cells = <2>; |
39 | | - ngpios = <6>; |
40 | | - pin-mask = <0x3f>; |
41 | | - }; |
| 27 | + ioex_it8801_port1: it8801_port@1 { |
| 28 | + compatible = "ite,it8801-gpio"; |
| 29 | + reg = <0x01 1 /* GPIPSR */ |
| 30 | + 0x06 1 /* GPSOVR */ |
| 31 | + 0x12 6 /* GPCR */ |
| 32 | + 0x33 1 /* GPISR */ |
| 33 | + 0x38 1>; /* GPIER */ |
| 34 | + gpio-controller; |
| 35 | + #gpio-cells = <2>; |
| 36 | + ngpios = <6>; |
| 37 | + pin-mask = <0x3f>; |
| 38 | + }; |
42 | 39 |
|
43 | | - ioex_it8801_port2: it8801_port@2 { |
44 | | - compatible = "ite,it8801-gpio"; |
45 | | - reg = <0x02 1 /* GPIPSR */ |
46 | | - 0x07 1 /* GPSOVR */ |
47 | | - 0x1a 4 /* GPCR */ |
48 | | - 0x34 1 /* GPISR */ |
49 | | - 0x39 1>; /* GPIER */ |
50 | | - gpio-controller; |
51 | | - #gpio-cells = <2>; |
52 | | - ngpios = <4>; |
53 | | - pin-mask = <0x0f>; |
54 | | - }; |
| 40 | + ioex_it8801_port2: it8801_port@2 { |
| 41 | + compatible = "ite,it8801-gpio"; |
| 42 | + reg = <0x02 1 /* GPIPSR */ |
| 43 | + 0x07 1 /* GPSOVR */ |
| 44 | + 0x1a 4 /* GPCR */ |
| 45 | + 0x34 1 /* GPISR */ |
| 46 | + 0x39 1>; /* GPIER */ |
| 47 | + gpio-controller; |
| 48 | + #gpio-cells = <2>; |
| 49 | + ngpios = <4>; |
| 50 | + pin-mask = <0x0f>; |
| 51 | + }; |
55 | 52 |
|
56 | | - /* KBD */ |
57 | | - ioex_it8801_kbd: it8801_kbd@40 { |
58 | | - compatible = "ite,it8801-kbd"; |
59 | | - status = "disabled"; |
60 | | - reg = <0x40 1 |
61 | | - 0x41 1 |
62 | | - 0x42 1 |
63 | | - 0x43 1>; |
64 | | - row-size = <8>; |
65 | | - col-size = <13>; |
66 | | - }; |
| 53 | + /* KBD */ |
| 54 | + ioex_it8801_kbd: it8801_kbd@40 { |
| 55 | + compatible = "ite,it8801-kbd"; |
| 56 | + status = "disabled"; |
| 57 | + reg = <0x40 1 |
| 58 | + 0x41 1 |
| 59 | + 0x42 1 |
| 60 | + 0x43 1>; |
| 61 | + row-size = <8>; |
| 62 | + col-size = <13>; |
| 63 | + }; |
67 | 64 |
|
68 | | - /* PWM */ |
69 | | - ioex_it8801_pwm1: it8801_pwm@60 { |
70 | | - compatible = "ite,it8801-pwm"; |
71 | | - status = "disabled"; |
72 | | - reg = <0x60 1 /* PWMMCR */ |
73 | | - 0x64 1 /* PWMDCR */ |
74 | | - 0x66 1 /* PWMPRSL */ |
75 | | - 0x67 1>; /* PWMPRSM */ |
76 | | - mfdctrl = <&pwm1_gp12_default>; |
77 | | - channel = <1>; |
78 | | - #pwm-cells = <3>; |
79 | | - }; |
| 65 | + /* PWM */ |
| 66 | + ioex_it8801_pwm1: it8801_pwm@60 { |
| 67 | + compatible = "ite,it8801-pwm"; |
| 68 | + status = "disabled"; |
| 69 | + reg = <0x60 1 /* PWMMCR */ |
| 70 | + 0x64 1 /* PWMDCR */ |
| 71 | + 0x66 1 /* PWMPRSL */ |
| 72 | + 0x67 1>; /* PWMPRSM */ |
| 73 | + mfdctrl = <&pwm1_gp12_default>; |
| 74 | + channel = <1>; |
| 75 | + #pwm-cells = <3>; |
| 76 | + }; |
80 | 77 |
|
81 | | - ioex_it8801_pwm2: it8801_pwm@68 { |
82 | | - compatible = "ite,it8801-pwm"; |
83 | | - status = "disabled"; |
84 | | - reg = <0x68 1 /* PWMMCR */ |
85 | | - 0x6c 1 /* PWMDCR */ |
86 | | - 0x6e 1 /* PWMPRSL */ |
87 | | - 0x6f 1>; /* PWMPRSM */ |
88 | | - mfdctrl = <&pwm2_gp13_default>; |
89 | | - channel = <2>; |
90 | | - #pwm-cells = <3>; |
91 | | - }; |
| 78 | + ioex_it8801_pwm2: it8801_pwm@68 { |
| 79 | + compatible = "ite,it8801-pwm"; |
| 80 | + status = "disabled"; |
| 81 | + reg = <0x68 1 /* PWMMCR */ |
| 82 | + 0x6c 1 /* PWMDCR */ |
| 83 | + 0x6e 1 /* PWMPRSL */ |
| 84 | + 0x6f 1>; /* PWMPRSM */ |
| 85 | + mfdctrl = <&pwm2_gp13_default>; |
| 86 | + channel = <2>; |
| 87 | + #pwm-cells = <3>; |
| 88 | + }; |
92 | 89 |
|
93 | | - ioex_it8801_pwm3: it8801_pwm@70 { |
94 | | - compatible = "ite,it8801-pwm"; |
95 | | - status = "disabled"; |
96 | | - reg = <0x70 1 /* PWMMCR */ |
97 | | - 0x74 1 /* PWMDCR */ |
98 | | - 0x76 1 /* PWMPRSL */ |
99 | | - 0x77 1>; /* PWMPRSM */ |
100 | | - mfdctrl = <&pwm3_gp14_default>; |
101 | | - channel = <3>; |
102 | | - #pwm-cells = <3>; |
103 | | - }; |
| 90 | + ioex_it8801_pwm3: it8801_pwm@70 { |
| 91 | + compatible = "ite,it8801-pwm"; |
| 92 | + status = "disabled"; |
| 93 | + reg = <0x70 1 /* PWMMCR */ |
| 94 | + 0x74 1 /* PWMDCR */ |
| 95 | + 0x76 1 /* PWMPRSL */ |
| 96 | + 0x77 1>; /* PWMPRSM */ |
| 97 | + mfdctrl = <&pwm3_gp14_default>; |
| 98 | + channel = <3>; |
| 99 | + #pwm-cells = <3>; |
| 100 | + }; |
104 | 101 |
|
105 | | - ioex_it8801_pwm4: it8801_pwm@78 { |
106 | | - compatible = "ite,it8801-pwm"; |
107 | | - status = "disabled"; |
108 | | - reg = <0x78 1 /* PWMMCR */ |
109 | | - 0x7c 1 /* PWMDCR */ |
110 | | - 0x7e 1 /* PWMPRSL */ |
111 | | - 0x7f 1>; /* PWMPRSM */ |
112 | | - mfdctrl = <&pwm4_gp15_default>; |
113 | | - channel = <4>; |
114 | | - #pwm-cells = <3>; |
115 | | - }; |
| 102 | + ioex_it8801_pwm4: it8801_pwm@78 { |
| 103 | + compatible = "ite,it8801-pwm"; |
| 104 | + status = "disabled"; |
| 105 | + reg = <0x78 1 /* PWMMCR */ |
| 106 | + 0x7c 1 /* PWMDCR */ |
| 107 | + 0x7e 1 /* PWMPRSL */ |
| 108 | + 0x7f 1>; /* PWMPRSM */ |
| 109 | + mfdctrl = <&pwm4_gp15_default>; |
| 110 | + channel = <4>; |
| 111 | + #pwm-cells = <3>; |
| 112 | + }; |
116 | 113 |
|
117 | | - ioex_it8801_pwm7: it8801_pwm@90 { |
118 | | - compatible = "ite,it8801-pwm"; |
119 | | - status = "disabled"; |
120 | | - reg = <0x90 1 /* PWMMCR */ |
121 | | - 0x94 1 /* PWMDCR */ |
122 | | - 0x96 1 /* PWMPRSL */ |
123 | | - 0x97 1>; /* PWMPRSM */ |
124 | | - mfdctrl = <&pwm7_gp20_default>; |
125 | | - channel = <7>; |
126 | | - #pwm-cells = <3>; |
| 114 | + ioex_it8801_pwm7: it8801_pwm@90 { |
| 115 | + compatible = "ite,it8801-pwm"; |
| 116 | + status = "disabled"; |
| 117 | + reg = <0x90 1 /* PWMMCR */ |
| 118 | + 0x94 1 /* PWMDCR */ |
| 119 | + 0x96 1 /* PWMPRSL */ |
| 120 | + 0x97 1>; /* PWMPRSM */ |
| 121 | + mfdctrl = <&pwm7_gp20_default>; |
| 122 | + channel = <7>; |
| 123 | + #pwm-cells = <3>; |
127 | 124 |
|
128 | | - }; |
| 125 | + }; |
129 | 126 |
|
130 | | - ioex_it8801_pwm8: it8801_pwm@98 { |
131 | | - compatible = "ite,it8801-pwm"; |
132 | | - status = "disabled"; |
133 | | - reg = <0x98 1 /* PWMMCR */ |
134 | | - 0x9c 1 /* PWMDCR */ |
135 | | - 0x9e 1 /* PWMPRSL */ |
136 | | - 0x9f 1>; /* PWMPRSM */ |
137 | | - mfdctrl = <&pwm8_gp23_default>; |
138 | | - channel = <8>; |
139 | | - #pwm-cells = <3>; |
140 | | - }; |
| 127 | + ioex_it8801_pwm8: it8801_pwm@98 { |
| 128 | + compatible = "ite,it8801-pwm"; |
| 129 | + status = "disabled"; |
| 130 | + reg = <0x98 1 /* PWMMCR */ |
| 131 | + 0x9c 1 /* PWMDCR */ |
| 132 | + 0x9e 1 /* PWMPRSL */ |
| 133 | + 0x9f 1>; /* PWMPRSM */ |
| 134 | + mfdctrl = <&pwm8_gp23_default>; |
| 135 | + channel = <8>; |
| 136 | + #pwm-cells = <3>; |
| 137 | + }; |
141 | 138 |
|
142 | | - ioex_it8801_pwm9: it8801_pwm@a0 { |
143 | | - compatible = "ite,it8801-pwm"; |
144 | | - status = "disabled"; |
145 | | - reg = <0xa0 1 /* PWMMCR */ |
146 | | - 0xa4 1 /* PWMDCR */ |
147 | | - 0xa6 1 /* PWMPRSL */ |
148 | | - 0xa7 1>; /* PWMPRSM */ |
149 | | - mfdctrl = <&pwm9_gp22_default>; |
150 | | - channel = <9>; |
151 | | - #pwm-cells = <3>; |
152 | | - }; |
| 139 | + ioex_it8801_pwm9: it8801_pwm@a0 { |
| 140 | + compatible = "ite,it8801-pwm"; |
| 141 | + status = "disabled"; |
| 142 | + reg = <0xa0 1 /* PWMMCR */ |
| 143 | + 0xa4 1 /* PWMDCR */ |
| 144 | + 0xa6 1 /* PWMPRSL */ |
| 145 | + 0xa7 1>; /* PWMPRSM */ |
| 146 | + mfdctrl = <&pwm9_gp22_default>; |
| 147 | + channel = <9>; |
| 148 | + #pwm-cells = <3>; |
153 | 149 | }; |
154 | 150 | }; |
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