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Temporarily revert the code part of D100981 "Delete le32/le64 targets"
This partially reverts commit 77ac823. Halide uses le32/le64 (halide/Halide#5934). Temporarily brings back the code part to give them some time for migration.
1 parent 149d5a8 commit ef5e7f9

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11 files changed

+156
-2
lines changed

11 files changed

+156
-2
lines changed

‎clang/lib/Basic/CMakeLists.txt‎

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Original file line numberDiff line numberDiff line change
@@ -77,6 +77,7 @@ add_clang_library(clangBasic
7777
Targets/BPF.cpp
7878
Targets/Hexagon.cpp
7979
Targets/Lanai.cpp
80+
Targets/Le64.cpp
8081
Targets/M68k.cpp
8182
Targets/MSP430.cpp
8283
Targets/Mips.cpp

‎clang/lib/Basic/Targets.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121
#include "Targets/BPF.h"
2222
#include "Targets/Hexagon.h"
2323
#include "Targets/Lanai.h"
24+
#include "Targets/Le64.h"
2425
#include "Targets/M68k.h"
2526
#include "Targets/MSP430.h"
2627
#include "Targets/Mips.h"
@@ -313,6 +314,17 @@ TargetInfo *AllocateTarget(const llvm::Triple &Triple,
313314
return new M68kTargetInfo(Triple, Opts);
314315
}
315316

317+
case llvm::Triple::le32:
318+
switch (os) {
319+
case llvm::Triple::NaCl:
320+
return new NaClTargetInfo<PNaClTargetInfo>(Triple, Opts);
321+
default:
322+
return nullptr;
323+
}
324+
325+
case llvm::Triple::le64:
326+
return new Le64TargetInfo(Triple, Opts);
327+
316328
case llvm::Triple::ppc:
317329
if (Triple.isOSDarwin())
318330
return new DarwinPPC32TargetInfo(Triple, Opts);

‎clang/lib/Basic/Targets/Le64.cpp‎

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@@ -0,0 +1,37 @@
1+
//===--- Le64.cpp - Implement Le64 target feature support -----------------===//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file implements Le64 TargetInfo objects.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
#include "Le64.h"
14+
#include "Targets.h"
15+
#include "clang/Basic/Builtins.h"
16+
#include "clang/Basic/MacroBuilder.h"
17+
#include "clang/Basic/TargetBuiltins.h"
18+
19+
using namespace clang;
20+
using namespace clang::targets;
21+
22+
const Builtin::Info Le64TargetInfo::BuiltinInfo[] = {
23+
#define BUILTIN(ID, TYPE, ATTRS) \
24+
{#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
25+
#include "clang/Basic/BuiltinsLe64.def"
26+
};
27+
28+
ArrayRef<Builtin::Info> Le64TargetInfo::getTargetBuiltins() const {
29+
return {};
30+
}
31+
32+
void Le64TargetInfo::getTargetDefines(const LangOptions &Opts,
33+
MacroBuilder &Builder) const {
34+
DefineStd(Builder, "unix", Opts);
35+
defineCPUMacros(Builder, "le64", /*Tuning=*/false);
36+
Builder.defineMacro("__ELF__");
37+
}

‎clang/lib/Basic/Targets/Le64.h‎

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@@ -0,0 +1,63 @@
1+
//===--- Le64.h - Declare Le64 target feature support -----------*- C++ -*-===//
2+
//
3+
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
//===----------------------------------------------------------------------===//
8+
//
9+
// This file declares Le64 TargetInfo objects.
10+
//
11+
//===----------------------------------------------------------------------===//
12+
13+
#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
14+
#define LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H
15+
16+
#include "clang/Basic/TargetInfo.h"
17+
#include "clang/Basic/TargetOptions.h"
18+
#include "llvm/ADT/Triple.h"
19+
#include "llvm/Support/Compiler.h"
20+
21+
namespace clang {
22+
namespace targets {
23+
24+
class LLVM_LIBRARY_VISIBILITY Le64TargetInfo : public TargetInfo {
25+
static const Builtin::Info BuiltinInfo[];
26+
27+
public:
28+
Le64TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
29+
: TargetInfo(Triple) {
30+
NoAsmVariants = true;
31+
LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
32+
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
33+
resetDataLayout("e-m:e-v128:32-v16:16-v32:32-v96:32-n8:16:32:64-S128");
34+
}
35+
36+
void getTargetDefines(const LangOptions &Opts,
37+
MacroBuilder &Builder) const override;
38+
39+
ArrayRef<Builtin::Info> getTargetBuiltins() const override;
40+
41+
BuiltinVaListKind getBuiltinVaListKind() const override {
42+
return TargetInfo::PNaClABIBuiltinVaList;
43+
}
44+
45+
const char *getClobbers() const override { return ""; }
46+
47+
ArrayRef<const char *> getGCCRegNames() const override { return None; }
48+
49+
ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
50+
return None;
51+
}
52+
53+
bool validateAsmConstraint(const char *&Name,
54+
TargetInfo::ConstraintInfo &Info) const override {
55+
return false;
56+
}
57+
58+
bool hasProtectedVisibility() const override { return false; }
59+
};
60+
61+
} // namespace targets
62+
} // namespace clang
63+
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_LE64_H

‎clang/lib/Basic/Targets/OSTargets.h‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -866,9 +866,11 @@ class LLVM_LIBRARY_VISIBILITY NaClTargetInfo : public OSTargetInfo<Target> {
866866
} else if (Triple.getArch() == llvm::Triple::x86_64) {
867867
this->resetDataLayout("e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-"
868868
"i64:64-n8:16:32:64-S128");
869-
} else {
870-
assert(Triple.getArch() == llvm::Triple::mipsel);
869+
} else if (Triple.getArch() == llvm::Triple::mipsel) {
871870
// Handled on mips' setDataLayout.
871+
} else {
872+
assert(Triple.getArch() == llvm::Triple::le32);
873+
this->resetDataLayout("e-p:32:32-i64:64");
872874
}
873875
}
874876
};

‎clang/lib/CodeGen/ItaniumCXXABI.cpp‎

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@@ -577,6 +577,13 @@ CodeGen::CGCXXABI *CodeGen::CreateItaniumCXXABI(CodeGenModule &CGM) {
577577
return new XLCXXABI(CGM);
578578

579579
case TargetCXXABI::GenericItanium:
580+
if (CGM.getContext().getTargetInfo().getTriple().getArch()
581+
== llvm::Triple::le32) {
582+
// For PNaCl, use ARM-style method pointers so that PNaCl code
583+
// does not assume anything about the alignment of function
584+
// pointers.
585+
return new ItaniumCXXABI(CGM, /*UseARMMethodPtrABI=*/true);
586+
}
580587
return new ItaniumCXXABI(CGM);
581588

582589
case TargetCXXABI::Microsoft:

‎clang/lib/CodeGen/TargetInfo.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -10970,6 +10970,8 @@ const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
1097010970
default:
1097110971
return SetCGInfo(new DefaultTargetCodeGenInfo(Types));
1097210972

10973+
case llvm::Triple::le32:
10974+
return SetCGInfo(new PNaClTargetCodeGenInfo(Types));
1097310975
case llvm::Triple::m68k:
1097410976
return SetCGInfo(new M68kTargetCodeGenInfo(Types));
1097510977
case llvm::Triple::mips:

‎clang/lib/Driver/ToolChains/Clang.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -3351,6 +3351,12 @@ static void RenderBuiltinOptions(const ToolChain &TC, const llvm::Triple &T,
33513351
StringRef FuncName = Arg->getValue();
33523352
CmdArgs.push_back(Args.MakeArgString("-fno-builtin-" + FuncName));
33533353
}
3354+
3355+
// le32-specific flags:
3356+
// -fno-math-builtin: clang should not convert math builtins to intrinsics
3357+
// by default.
3358+
if (TC.getArch() == llvm::Triple::le32)
3359+
CmdArgs.push_back("-fno-math-builtin");
33543360
}
33553361

33563362
bool Driver::getDefaultModuleCachePath(SmallVectorImpl<char> &Result) {

‎llvm/include/llvm/ADT/Triple.h‎

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Original file line numberDiff line numberDiff line change
@@ -85,6 +85,8 @@ class Triple {
8585
xcore, // XCore: xcore
8686
nvptx, // NVPTX: 32-bit
8787
nvptx64, // NVPTX: 64-bit
88+
le32, // le32: generic little-endian 32-bit CPU (PNaCl)
89+
le64, // le64: generic little-endian 64-bit CPU (PNaCl)
8890
amdil, // AMDIL
8991
amdil64, // AMDIL with 64-bit pointers
9092
hsail, // AMD HSAIL

‎llvm/lib/Support/Triple.cpp‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
4242
case hsail: return "hsail";
4343
case kalimba: return "kalimba";
4444
case lanai: return "lanai";
45+
case le32: return "le32";
46+
case le64: return "le64";
4547
case m68k: return "m68k";
4648
case mips64: return "mips64";
4749
case mips64el: return "mips64el";
@@ -134,6 +136,9 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
134136
case nvptx: return "nvvm";
135137
case nvptx64: return "nvvm";
136138

139+
case le32: return "le32";
140+
case le64: return "le64";
141+
137142
case amdil:
138143
case amdil64: return "amdil";
139144

@@ -310,6 +315,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
310315
.Case("xcore", xcore)
311316
.Case("nvptx", nvptx)
312317
.Case("nvptx64", nvptx64)
318+
.Case("le32", le32)
319+
.Case("le64", le64)
313320
.Case("amdil", amdil)
314321
.Case("amdil64", amdil64)
315322
.Case("hsail", hsail)
@@ -441,6 +448,8 @@ static Triple::ArchType parseArch(StringRef ArchName) {
441448
.Case("xcore", Triple::xcore)
442449
.Case("nvptx", Triple::nvptx)
443450
.Case("nvptx64", Triple::nvptx64)
451+
.Case("le32", Triple::le32)
452+
.Case("le64", Triple::le64)
444453
.Case("amdil", Triple::amdil)
445454
.Case("amdil64", Triple::amdil64)
446455
.Case("hsail", Triple::hsail)
@@ -700,6 +709,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
700709
case Triple::hsail:
701710
case Triple::kalimba:
702711
case Triple::lanai:
712+
case Triple::le32:
713+
case Triple::le64:
703714
case Triple::m68k:
704715
case Triple::mips64:
705716
case Triple::mips64el:
@@ -1273,6 +1284,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
12731284
case llvm::Triple::hsail:
12741285
case llvm::Triple::kalimba:
12751286
case llvm::Triple::lanai:
1287+
case llvm::Triple::le32:
12761288
case llvm::Triple::m68k:
12771289
case llvm::Triple::mips:
12781290
case llvm::Triple::mipsel:
@@ -1302,6 +1314,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
13021314
case llvm::Triple::bpfeb:
13031315
case llvm::Triple::bpfel:
13041316
case llvm::Triple::hsail64:
1317+
case llvm::Triple::le64:
13051318
case llvm::Triple::mips64:
13061319
case llvm::Triple::mips64el:
13071320
case llvm::Triple::nvptx64:
@@ -1356,6 +1369,7 @@ Triple Triple::get32BitArchVariant() const {
13561369
case Triple::hsail:
13571370
case Triple::kalimba:
13581371
case Triple::lanai:
1372+
case Triple::le32:
13591373
case Triple::m68k:
13601374
case Triple::mips:
13611375
case Triple::mipsel:
@@ -1383,6 +1397,7 @@ Triple Triple::get32BitArchVariant() const {
13831397
case Triple::aarch64_be: T.setArch(Triple::armeb); break;
13841398
case Triple::amdil64: T.setArch(Triple::amdil); break;
13851399
case Triple::hsail64: T.setArch(Triple::hsail); break;
1400+
case Triple::le64: T.setArch(Triple::le32); break;
13861401
case Triple::mips64: T.setArch(Triple::mips); break;
13871402
case Triple::mips64el: T.setArch(Triple::mipsel); break;
13881403
case Triple::nvptx64: T.setArch(Triple::nvptx); break;
@@ -1426,6 +1441,7 @@ Triple Triple::get64BitArchVariant() const {
14261441
case Triple::bpfeb:
14271442
case Triple::bpfel:
14281443
case Triple::hsail64:
1444+
case Triple::le64:
14291445
case Triple::mips64:
14301446
case Triple::mips64el:
14311447
case Triple::nvptx64:
@@ -1447,6 +1463,7 @@ Triple Triple::get64BitArchVariant() const {
14471463
case Triple::arm: T.setArch(Triple::aarch64); break;
14481464
case Triple::armeb: T.setArch(Triple::aarch64_be); break;
14491465
case Triple::hsail: T.setArch(Triple::hsail64); break;
1466+
case Triple::le32: T.setArch(Triple::le64); break;
14501467
case Triple::mips: T.setArch(Triple::mips64); break;
14511468
case Triple::mipsel: T.setArch(Triple::mips64el); break;
14521469
case Triple::nvptx: T.setArch(Triple::nvptx64); break;
@@ -1479,6 +1496,8 @@ Triple Triple::getBigEndianArchVariant() const {
14791496
case Triple::hsail64:
14801497
case Triple::hsail:
14811498
case Triple::kalimba:
1499+
case Triple::le32:
1500+
case Triple::le64:
14821501
case Triple::msp430:
14831502
case Triple::nvptx64:
14841503
case Triple::nvptx:
@@ -1567,6 +1586,8 @@ bool Triple::isLittleEndian() const {
15671586
case Triple::hsail64:
15681587
case Triple::hsail:
15691588
case Triple::kalimba:
1589+
case Triple::le32:
1590+
case Triple::le64:
15701591
case Triple::mips64el:
15711592
case Triple::mipsel:
15721593
case Triple::msp430:

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