Update (2023.07.03, 2nd)

31295: Provide information when hitting a HaltNode
30973: serviceability/jvmti/events/FramePop/framepop02/framepop02.java crash with -Xcomp
25064: Enable NUMA Mode on LoongArch by Default
31006: Fix VectorInsert

Author: loongson-jvm

src/hotspot/cpu/loongarch/assembler_loongarch.hpp

@@ -1289,6 +1289,7 @@ class Assembler : public AbstractAssembler  {
     stptr_w_op         = 0b00100101,
     ldptr_d_op         = 0b00100110,
     stptr_d_op         = 0b00100111,
+    csr_op             = 0b00000100,
 
     unknow_ops8        = 0b11111111
   };
@@ -2024,6 +2025,8 @@ class Assembler : public AbstractAssembler  {
   void stptr_w  (Register rd, Register rj, int si16)  { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(stptr_w_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); }
   void ldptr_d  (Register rd, Register rj, int si16)  { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(ldptr_d_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); }
   void stptr_d  (Register rd, Register rj, int si16)  { assert(is_simm(si16, 16) && ((si16 & 0x3) == 0), "not a signed 16-bit int"); emit_int32(insn_I14RR(stptr_d_op, si16>>2, (int)rj->encoding(), (int)rd->encoding())); }
+  void csrrd  (Register rd, int csr)   { emit_int32(insn_I14RR(csr_op, csr, 0, (int)rd->encoding())); }
+  void csrwr  (Register rd, int csr)   { emit_int32(insn_I14RR(csr_op, csr, 1, (int)rd->encoding())); }
 
   void ld_b  (Register rd, Register rj, int si12)  { assert(is_simm(si12, 12), "not a signed 12-bit int"); emit_int32(insn_I12RR(ld_b_op,  si12, (int)rj->encoding(), (int)rd->encoding())); }
   void ld_h  (Register rd, Register rj, int si12)  { assert(is_simm(si12, 12), "not a signed 12-bit int"); emit_int32(insn_I12RR(ld_h_op,  si12, (int)rj->encoding(), (int)rd->encoding())); }

src/hotspot/cpu/loongarch/globals_loongarch.hpp

@@ -105,7 +105,14 @@ define_pd_global(intx, InitArrayShortSize, 8*BytesPerLong);
           "Enables intrinsification of BigInteger.shiftLeft/Right()")       \
                                                                             \
   product(bool, UseActiveCoresMP, false,                                    \
-                "Eliminate barriers for single active cpu")
+                "Eliminate barriers for single active cpu")                 \
+                                                                            \
+  product(uintx, NUMAMinHeapSizePerNode, 128 * M,                           \
+          "The minimum heap size required for each NUMA node to init VM")   \
+                                                                            \
+  product(bool, TraceTraps, false, "Trace all traps the signal handler")    \
+  product(uintx, NUMAMinG1RegionNumberPerNode, 8,                           \
+          "Min initial region number for per NUMA node while using G1GC")
 
 // end of ARCH_FLAGS
 

src/hotspot/cpu/loongarch/loongarch_64.ad

@@ -11550,13 +11550,13 @@ instruct ShouldNotReachHere( )
   ins_cost(300);
 
   // Use the following format syntax
-  format %{ "ILLTRAP   ;#@ShouldNotReachHere" %}
+  format %{ "stop; #@ShouldNotReachHere" %}
   ins_encode %{
     if (is_reachable()) {
-      // Here we should emit illtrap!
-      __ stop("ShouldNotReachHere");
+      __ stop(_halt_reason);
     }
   %}
+
   ins_pipe( pipe_jump );
 %}
 
@@ -16589,13 +16589,19 @@ instruct insert32B(vecY dst, mRegI val, immIU5 idx) %{
   match(Set dst (VectorInsert (Binary dst val) idx));
   format %{ "xvinsert    $dst, $val, $idx\t# @insert32B" %}
   ins_encode %{
-    if ($idx$$constant < 16) {
-      __ vinsgr2vr_b($dst$$FloatRegister, $val$$Register, $idx$$constant);
-    } else {
-      __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110);
-      __ vinsgr2vr_b($dst$$FloatRegister, $val$$Register, $idx$$constant-16);
-      __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110);
+    int idx = $idx$$constant;
+    int msbw, lsbw;
+    switch (idx % 4) {
+      case 0: msbw =  7, lsbw =  0; break;
+      case 1: msbw = 15, lsbw =  8; break;
+      case 2: msbw = 23, lsbw = 16; break;
+      case 3: msbw = 31, lsbw = 24; break;
+      default:
+        ShouldNotReachHere();
     }
+    __ xvpickve2gr_w(SCR1, $dst$$FloatRegister, idx >> 2);
+    __ bstrins_w(SCR1, $val$$Register, msbw, lsbw);
+    __ xvinsgr2vr_w($dst$$FloatRegister, SCR1, idx >> 2);
   %}
   ins_pipe( pipe_slow );
 %}
@@ -16605,13 +16611,12 @@ instruct insert16S(vecY dst, mRegI val, immIU4 idx) %{
   match(Set dst (VectorInsert (Binary dst val) idx));
   format %{ "xvinsert    $dst, $val, $idx\t# @insert16S" %}
   ins_encode %{
-    if ($idx$$constant < 8) {
-      __ vinsgr2vr_h($dst$$FloatRegister, $val$$Register, $idx$$constant);
-    } else {
-      __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110);
-      __ vinsgr2vr_h($dst$$FloatRegister, $val$$Register, $idx$$constant-8);
-      __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b01001110);
-    }
+    int idx = $idx$$constant;
+    int msbw = (idx % 2) ? 31 : 15;
+    int lsbw = (idx % 2) ? 16 :  0;
+    __ xvpickve2gr_w(SCR1, $dst$$FloatRegister, idx >> 1);
+    __ bstrins_w(SCR1, $val$$Register, msbw, lsbw);
+    __ xvinsgr2vr_w($dst$$FloatRegister, SCR1, idx >> 1);
   %}
   ins_pipe( pipe_slow );
 %}

src/hotspot/cpu/loongarch/macroAssembler_loongarch.cpp

@@ -633,22 +633,11 @@ void MacroAssembler::debug(char* msg/*, RegistersForDebugging* regs*/) {
 }
 
 void MacroAssembler::stop(const char* msg) {
-  li(A0, (long)msg);
-  call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type);
-  brk(17);
-}
-
-void MacroAssembler::warn(const char* msg) {
-  push_call_clobbered_registers();
-  li(A0, (long)msg);
-  push(S2);
-  move(S2, SP);     // use S2 as a sender SP holder
-  assert(StackAlignmentInBytes == 16, "must be");
-  bstrins_d(SP, R0, 3, 0); // align stack as required by ABI
-  call(CAST_FROM_FN_PTR(address, MacroAssembler::debug), relocInfo::runtime_call_type);
-  move(SP, S2);     // use S2 as a sender SP holder
-  pop(S2);
-  pop_call_clobbered_registers();
+#ifndef PRODUCT
+  block_comment(msg);
+#endif
+  csrrd(R0, 0);
+  emit_int64((uintptr_t)msg);
 }
 
 void MacroAssembler::increment(Register reg, int imm) {

src/hotspot/cpu/loongarch/macroAssembler_loongarch.hpp

@@ -407,9 +407,6 @@ class MacroAssembler: public Assembler {
   // prints msg, dumps registers and stops execution
   void stop(const char* msg);
 
-  // prints msg and continues
-  void warn(const char* msg);
-
   static void debug(char* msg/*, RegistersForDebugging* regs*/);
   static void debug64(char* msg, int64_t pc, int64_t regs[]);
 

src/hotspot/cpu/loongarch/nativeInst_loongarch.cpp

@@ -401,6 +401,10 @@ bool NativeInstruction::is_sigill_not_entrant() {
   return uint_at(0) == NativeIllegalInstruction::instruction_code;
 }
 
+bool NativeInstruction::is_stop() {
+  return uint_at(0) == 0x04000000; // csrrd R0 0
+}
+
 void NativeIllegalInstruction::insert(address code_pos) {
   *(juint*)code_pos = instruction_code;
   ICache::invalidate_range(code_pos, instruction_size);

src/hotspot/cpu/loongarch/nativeInst_loongarch.hpp

@@ -86,6 +86,7 @@ class NativeInstruction {
   inline bool is_NativeCallTrampolineStub_at();
   //We use an illegal instruction for marking a method as not_entrant or zombie.
   bool is_sigill_not_entrant();
+  bool is_stop();
 
  protected:
   address addr_at(int offset) const    { return address(this) + offset; }

src/hotspot/cpu/loongarch/sharedRuntime_loongarch_64.cpp

@@ -414,6 +414,7 @@ static void patch_callers_callsite(MacroAssembler *masm) {
   __ beqz(AT, L);
 
   __ enter();
+  __ bstrins_d(SP, R0, 3, 0);  // align the stack
   __ push_call_clobbered_registers();
 
   // VM needs caller's callsite
@@ -427,8 +428,6 @@ static void patch_callers_callsite(MacroAssembler *masm) {
 
   __ move(c_rarg0, Rmethod);
   __ move(c_rarg1, RA);
-  assert(StackAlignmentInBytes == 16, "must be");
-  __ bstrins_d(SP, R0, 3, 0);  // align the stack
   __ call(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite),
           relocInfo::runtime_call_type);
 

src/hotspot/os/linux/os_linux.cpp

@@ -4394,6 +4394,44 @@ void os::Linux::numa_init() {
       // If there's only one node (they start from 0) or if the process
       // is bound explicitly to a single node using membind, disable NUMA
       UseNUMA = false;
+#ifdef LOONGARCH64
+    } else if (InitialHeapSize < NUMAMinHeapSizePerNode * os::numa_get_groups_num()) {
+      // The MaxHeapSize is not actually used by the JVM unless your program
+      // creates enough objects to require it. A much smaller amount, called
+      // the InitialHeapSize, is allocated during JVM initialization.
+      //
+      // Setting the minimum and maximum heap size to the same value is typically
+      // not a good idea because garbage collection is delayed until the heap is
+      // full. Therefore, the first time that the GC runs, the process can take
+      // longer. Also, the heap is more likely to be fragmented and require a heap
+      // compaction. Start your application with the minimum heap size that your
+      // application requires. When the GC starts up, it runs frequently and
+      // efficiently because the heap is small.
+      //
+      // If the GC cannot find enough garbage, it runs compaction. If the GC finds
+      // enough garbage, or any of the other conditions for heap expansion are met,
+      // the GC expands the heap.
+      //
+      // Therefore, an application typically runs until the heap is full. Then,
+      // successive garbage collection cycles recover garbage. When the heap is
+      // full of live objects, the GC compacts the heap. If sufficient garbage
+      // is still not recovered, the GC expands the heap.
+      if (FLAG_IS_DEFAULT(UseNUMA)) {
+        FLAG_SET_ERGO(UseNUMA, false);
+      } else if (UseNUMA) {
+        log_info(os)("UseNUMA is disabled since insufficient initial heap size.");
+        UseNUMA = false;
+      }
+    } else if (FLAG_IS_CMDLINE(NewSize) &&
+               (NewSize < ScaleForWordSize(1*M) * os::numa_get_groups_num())) {
+      if (FLAG_IS_DEFAULT(UseNUMA)) {
+        FLAG_SET_ERGO(UseNUMA, false);
+      } else if (UseNUMA) {
+        log_info(os)("Handcrafted MaxNewSize should be large enough "
+                     "to avoid GC trigger before VM initialization completed.");
+        UseNUMA = false;
+      }
+#endif
     } else {
       LogTarget(Info,os) log;
       LogStream ls(log);

src/hotspot/os_cpu/linux_loongarch/os_linux_loongarch.cpp

@@ -266,6 +266,24 @@ bool PosixSignals::pd_hotspot_signal_handler(int sig, siginfo_t* info,
 #ifdef PRINT_SIGNAL_HANDLE
         tty->print_cr("continuation_for_implicit_exception stub: %lx", stub);
 #endif
+      } else if (sig == SIGILL && nativeInstruction_at(pc)->is_stop()) {
+        // Pull a pointer to the error message out of the instruction
+        // stream.
+        const uint64_t *detail_msg_ptr
+          = (uint64_t*)(pc + 4/*NativeInstruction::instruction_size*/);
+        const char *detail_msg = (const char *)*detail_msg_ptr;
+        const char *msg = "stop";
+        if (TraceTraps) {
+          tty->print_cr("trap: %s: (SIGILL)", msg);
+        }
+
+        // End life with a fatal error, message and detail message and the context.
+        // Note: no need to do any post-processing here (e.g. signal chaining)
+        va_list va_dummy;
+        VMError::report_and_die(thread, uc, nullptr, 0, msg, detail_msg, va_dummy);
+        va_end(va_dummy);
+
+        ShouldNotReachHere();
       }
     } else if ((thread->thread_state() == _thread_in_vm ||
                  thread->thread_state() == _thread_in_native) &&
@@ -456,9 +474,8 @@ void os::print_tos_pc(outputStream *st, const void *context) {
   // point to garbage if entry point in an nmethod is corrupted. Leave
   // this at the end, and hope for the best.
   address pc = os::fetch_frame_from_context(uc).pc();
-  st->print_cr("Instructions: (pc=" PTR_FORMAT ")", p2i(pc));
-  print_hex_dump(st, pc - 64, pc + 64, sizeof(char));
-  Disassembler::decode(pc - 80, pc + 80, st);
+  print_instructions(st, pc, 4/*native instruction size*/);
+  st->cr();
 }
 
 void os::setup_fpu() {